There has been a demand for lower resistance of wiring in order to perform a high-speed operation of semiconductor elements. It is however undesirable to thicken a wiring formed under design rules (line and space) to lower the resistance of the wiring because the thick wiring increases a wiring-to-wiring capacitance. In general, the decrease in wiring resistance and the reduction in wiring-to-wiring capacitance are contradictory to each other.
A damascene technique is known as a new wiring forming method. In this technique, an insulation film is formed, and a wiring trench is formed in the insulation film and then filled with wiring materials (e.g., metallic materials such as aluminum). A planarization method such as CMP (Chemical Mechanical Polishing) is employed for filling the wiring trench with the wiring materials.
A conventional wiring forming method using a dual damascene technique which is an improvement of the damascene technique, will now be described with reference to FIGS. 12A to 12D.
Referring first to FIG. 12A, a lower wiring layer 203 is formed on a silicon (Si) substrate 201 with an interlayer insulation film 202 therebetween, and a flat interlayer insulation film 204 (SiO.sub.2 film) is formed on the lower wiring layer 203. A wiring trench 205 (whose depth is for example 0.5 .mu.m) is then formed in the SiO.sub.2 film 204.
Referring then to FIG. 12B, resist is applied onto the entire surface of the resultant structure and exposed by lithography to form a resist pattern 206 for forming a contact hole. Using this resist pattern 206 as a mask, its underlying SiO.sub.2 film 204 is etched to form a contact hole 207 therein.
As shown in FIG. 12C, the resist pattern 206 is exfoliated and then a metal film 208, which is to serves as wiring, is deposited on the whole surface so as to fill both the wiring trench 205 and contact hole 207.
Finally, as illustrated in FIG. 12D, an unnecessary portion of the metal film 208, which exists outside the wiring trench 205 and contact hole 207, is eliminated by CMP.
Consequently, a wiring structure (dual damascene structure) is completed in which both the wiring trench 205 and contact hole 207 are filled with the metal film (wiring) 208.
FIG. 13 shows a lengthwise cross section of the wiring 208 formed by the dual damascene method. Though contact portions 209 of the wiring are also filled with wiring materials, a wiring portion thereof (excluding the contact portions 209) has a uniform thickness.
Even in the wiring forming technique using the dual damascene method, it is difficult to decrease in both wiring resistance and wiring-to-wiring capacitance at the same time. More specifically, the wiring thickness depends upon a relationship between wiring-to-wiring capacitance and wiring resistance at the minimum pitch in which an increase of the wiring-to-wiring resistance is a serious problem, and it is difficult to lower the wiring resistance while preventing the wiring-to-wiring capacitance from increasing when the wiring is more miniaturized by higher degree of integration.
As one method of resolving the above problem, a wiring structure having different wiring depths and its manufacturing method are proposed (Jpn. Pat. Appln. KOKAI Publication No. 9-321046). This method will now be described in brief with reference to FIGS. 14A to 14D.
First, as illustrated in FIG. 14A, an interlayer insulation film 222 is formed on a silicon substrate 221, a lower wiring layer 223 is formed on the film 222, and another interlayer insulation film 224 is formed on the film 222 and layer 223. Trenches 226, 227 and 228 are then formed in the interlayer insulation film 224 using a resist pattern 225 as a mask.
As shown in FIG. 14B, using a resist pattern 229 as a mask, the interlayer insulation film 224 is etched to form a contact hole 230 and wiring trenches 231 and 232.
As shown in FIG. 14C, a metal film 233 serving as wiring is formed on the entire surface of the resultant structure so as to fill the contact hole 230 and wiring trenches 231 and 232.
Finally, as illustrated in FIG. 14D, an unnecessary portion of the metal film 233, which exists outside the contact hole 230 and wiring trenches 231 and 232, is eliminated, thus completing wirings 235 to 238. The wiring 235 is connected to the lower wiring layer 223 through a contact portion 234.